Gate oxide loss at the periphery of a metal–oxide–semiconductor field-effect transistor resulting from a polysilicon gate etch with a helicon etch tool

Abstract

This article describes a study of gate oxide loss at the gate periphery of a metal–oxide–semiconductor field-effect transistor (MOSFET) resulting from a polysilicon gate etch with a commercially available low pressure, high density plasma helicon etch tool. When the oxide is removed at the periphery of a MOSFET with the gate etch process, it is possible to damage the underlying silicon in the source and drain regions leading to device degradation or failure. Conventional oxide thickness and scanning electron microscope measurements after the gate etch have been shown to be inadequate in detecting microtrenches and microholes in the oxide at the gate periphery. To measure the integrity of the oxide at the gate periphery, a modified MOS (MMOS) capacitor test structure has been developed to measure the electrical field breakdown strength of the oxide at the gate periphery. This article describes a MMOS study of the oxide loss and underlying etch mechanisms encountered in a low pressure, high plasma density helicon etch tool.