Gate-Lifted nMOS ESD Protection Device Triggered by a p-n-p in Series With a Diode

Abstract

We demonstrate a gate-lifted nMOS electrostatic discharge (ESD) protection device triggered by a p-n-p in series with a diode in a 0.18- $\mu \text{m}$ bulk CMOS technology for 5-V mobile applications up to 85 °C. This voltage-triggering scheme is suitable for fail-safe, open-drain, supply, and surge protections. In addition, the robust ESD performance is boosted by parasitic embedded-silicon-controlled-rectifier action in the high-current regime. No extra masks nor additional RC control circuitry are required for this implementation.