Gate field induced ordered electric dipoles in a polymer dielectric for low-voltage operating organic thin-film transistors

Abstract

The development of low voltage-operating organic thin-film transistors requires high-dielectric constant (high-K) materials for the device's gate dielectrics. The surface properties of these high-K materials must match those of organic semiconductors. A modification material coated on high-K dielectric is needed, and polyimide (PI) is a promising modifier to reduce the surface energy and the interface trap states (in the level of 1010 cm−2 eV−1) of the high-K dielectrics. In this study, surface characteristics of the dielectrics were identified and interface analyses at the dielectric/organic semiconductor interface were conducted through combined electrical force microscopy and impedance–admittance investigation. When the organic semiconductor pentacene was grown on the PI-modified dielectrics, the atomic force microscopy images and X-ray diffraction analyses showed larger grain size and higher crystallinity than those on native high-K dielectrics. Using polyimide-modified high-K materials as the gate dielectric, high performances (SS < 1 V per decade, μ above 0.1 cm2 V−1 s−1, and on/off ratio > 105) and low voltage-operating (<5 V) pentacene-based thin-film transistors were achieved. Although the gate field was decreased by inserting a PI layer, the effective gate field was compensated by an electric dipole-induced dipole field embedded in the PI layer. The mechanism of carrier accumulation at the PI/pentacene interface was also clearly described.