Gate current tunneling modulated by magnetic field in 65nm nMOSFET's

Abstract

An alternative characterization technique for ultra-thin gate oxides unveils that a magnetic field, applied parallel to the surface and perpendicular to the channel current, modulates both gate oxide tunneling and channel current. This is attributed to magnetic modulation of both quantum confinement and the Si-SiO2 potential barrier of a MOSFET. This new characterization technique serves to study the physics behind gate oxide tunneling [1], carrier quantization at the inversion/accumulation layers [2], and other effects at the Si-SiO 2 interface of ultra-thin gate oxide MOSFETs, which add and extended characterization capability to pure electrical characterization techniques. The measured gate current Ig of a (W/L)=(2μm/65nm) nMOS transistor, with a gate oxide thickness of 1.9 nm, and exposed to a magnetic field B of +/-25 mili-Teslas (mT), is shown in Figure 1. The difference of the Ig current at B=+/-25 mT minus Ig at B=0 mT, here called AIg, is plotted in the right axis. A +Bz implies a magnetic field coming into the device, and a negative -Bz coming out the device. In this case a +Bz field implies the carrier distribution peak is pushed away from the Si-SiO 2 interface, which lowers the tunneling probability by increasing the tunneling distance. On the other hand, because of the quasi-bond states of the quantized inversion channel, the potential barrier height reduces. These two quantum mechanisms play against each other giving an instable behavior for Vg>0.75 V as seen in Figure 2 where the differential channel current AId (Id at B=+/− 25mT minus Id at B=0 mT) is plotted versus Vg. The inverted electron distribution peaks is pushed down away of the interface (for +Bz), which in turns reduces surface carrier scattering giving a net increase of Id. Note that for Vg>0.75 V, when the AIg current becomes instable, the AId current has an inflection point. At this Vg point both the lowering of the tunneling probability and the potential barrier height starts to compete against each other. The redistributed electron inverted distribution dominates over the carrier mobility resulting in a AId roll-off In order to verify the analysis resulted from the experiments, a set of 3D numerical electro-magnetic simulations were preformed with Minimos-NT [3, 4]. The results are shown in Figure 3. The simulation software is set to account for models of direct tunneling in the channel, tunneling at the gate-drain/source edges, and energy quantization at the inversion and accumulation layers (gate-source/drain overlapping regions). To reproduce the experimental results the centroid peak (y p ) of the inversion layer was adjusted from 0.5 nm (continuous line) to 0.75 nm (dashed line). This simulation confirms that energy quantization, and thus the electron inversion distribution peak, and tunneling probability are correlated to each other. The measured and simulated results for different magnetic field intensities and bias conditions are shown in Figure 4. The AId-Bz curve has a parabolic behavior, where the channel resistance is proportional to [1+((q/m∗)xBz)2]. Where ris the scattering time. The interplay of the carrier distribution and carrier mobility makes the maximum of the parabolic curve to shift to higher magnetic fields for larger Vd voltages. m∗ is the effective mass. The fluctuation of the gate current respect to Bz has a small dependence on the drain voltage. Further detailed measurements show the minimum magnetic field Bz that this MOSFET is able to detect is around 500 micro-Teslas. This magnitude is quite well within the range of on-chip generated magnetic fields [5], which is an indication that on-chip magnetic fields are self-inducing both channel current interference and gate leakage current.