GaP Growth on Si(100) and Anti-phase Disorder

Abstract

The technological interest in the superior electronic and optoelectronic properties of III–V semiconductors promotes the research in heteroepitaxy on silicon (Si) substrates for integration in established micro-electronics. However, major challenges have to be met at the III–V/Si heterojunction: crucial issues are differences in lattice constants and thermal expansion coefficients as well as the formation of the heterovalent (polar-on-non-polar) interface necessitating a suitable substrate preparation prior to heteroepitaxy. New defect mechanisms—typically not observed in III–V homoepitaxy—arise from the interface with the Si(100) substrate and need to be controlled to achieve defect concentrations suitable for applications in advanced optoelectronic devices.