GaN-Based GAA Vertical CMOS Inverter

Xinke Liu,Jiaying Yang,Mark Huang,Bo Li,Ziyue Zhang,Feng Lin,Jian Li,Wei He

doi:10.1109/jeds.2022.3149932

Xinke Liu, Jiaying Yang + Show 6 more

Open Access

https://doi.org/10.1109/jeds.2022.3149932

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Abstract

In this work, we simulate the static and dynamic characteristics of gallium nitride (GaN)-based gate-all-around (GAA) vertical nanowire complementary metal–oxide–semiconductor (CMOS) inverter. Based on the 3-D simulator of Silvaco-TCAD, the simulated physical models and associated model parameters have been well calibrated with the reported experimental results of GaN n-channel NWFET and the simulated typical electrical parameters match the measured data. According to the simulation results, the GaN GAA vertical nanowire CMOS inverter exhibits rail-to-rail operation, low static power dissipation, large noise margins, high thermal stability and good scalability.

Highlights

GALLIUM nitride (GaN) has become important semiconductor for power device applications due to its superior material properties such as wide bandgap energy, high breakdown field, high electron mobility and superior thermal stability [1,2,3,4]
All of these demonstrations rely on the integration of lateral AlGaN/GaN high-electron-mobility transistors (HEMTs) and the importance of the scaling theory is not well proven
To demonstrate the potential of vertical nanowire field-effect transistor (NWFET) and scaling MOS transistors, it is important to simulate the characteristics of GaN GAA vertical nanowire complementary metal-oxide-semiconductor (CMOS) inverter

Summary

INTRODUCTION

GALLIUM nitride (GaN) has become important semiconductor for power device applications due to its superior material properties such as wide bandgap energy, high breakdown field, high electron mobility and superior thermal stability [1,2,3,4]. GaN-based gate-all-around (GAA) vertical nanowire field-effect transistor (NWFET) with three-dimensional (3-D) gate structures have shown further improved performances, such as high on-and-off-state current ratio, low off-state leakage current and linearity, due to the excellent gate controllability [5,6,7,8]. The main benefits of scalability are (1) smaller device sizes and reduced chip size (increased yield and more parts per wafer), (2) lower gate delays, allowing higher frequency operation, and (3) reduction in power dissipation [10].GaN-based GAA vertical nanowire CMOS inverter may be useful for integrating some digital. To demonstrate the potential of vertical NWFET and scaling MOS transistors, it is important to simulate the characteristics of GaN GAA vertical nanowire CMOS inverter. Due to many excellent characteristics, GaN-based nanowire CMOS inverter could be used in high-temperature, high-frequency, high-power-density applications

DEVICE STRUCTURE AND SIMULATION MODELS

SIMULATION RESULTS AND DISCUSSION

CONCLUSION