GaN on Engineered Bulk Silicon Power Integration Platform With Avalanche Capability Enabled by Built-in Si PN Junctions

Abstract

A GaN on engineered bulk silicon (GaN-on-EBUS) power IC platform featuring an industry-standard 200-V GaN power HEMT epi-structure has been recently demonstrated, showing effective isolation and crosstalk suppression between the high-side (HS) and low-side (LS) GaN transistors in half-bridge configuration. In this work, we scale up the vertical breakdown voltage (BV) of the GaN film on the EBUS substrate to be over 600 V. Meanwhile, the built-in back-to-back PN junctions along the trench created in the Si substrate are employed to provide an overvoltage-protection scheme through their intrinsic avalanche capability for the overlaying GaN half-bridge circuit.