Gallium Arsenide Deposition Improved

Abstract

A technique to deposit nearly perfect layers of gallium arsenide onto silicon wafers has been developed by electrical engineering professor Hadis Morkoc at the University of Illinois. The technique may simplify production of electronic integrated circuit devices on gallium arsenide substrates. It also may let fabricators of silicon semiconductors incorporate gallium arsenide technology into their own devices. Morkoc says the process will work with compound semiconductors other than gallium arsenide. Gallium arsenide technology is the most advanced of these, however. The attraction of gallium arsenide over silicon is that gallium arsenide-based devices are faster, achieving speeds of80tol00gigaHertz. One difficulty with pure gallium arsenide wafers is that they are brittle, and their quality is often poor. That makes it hard to work with them even at diameters of 3 inches. Morkoc says the strength of silicon wafers coated with gallium arsenide might let chip makers work at larger diameters using convention...