Abstract
In the past several decades, Moore’s law has successfully predicted integrated circuit (IC) technology advancement. However, IC technology began hitting both technology and cost barriers. Conventional die shrinkage and advanced deep-submicron semiconductor technology is no longer able to meet the cost-to-performance ratio that the world desires in the near future. Three-dimensional (3D) packaging has caught broad attention and is poised to help continue the Moore’s law by vertically integrating multiple IC chips into same footprint. In order to enable highly integrated 3D packaging, both the substrate and the printed wiring board (PWB) receiving the 3D package need to meet the signal and power density requirements. Substrate material and fabrication technologies play critical role in succeeding the future needs of smaller size, lower cost, and higher performance.
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