Abstract
The increasing demand for ultra-high speed processors, smaller dimensions and lower power consumption of integrated circuits has made the technology scaling of the electronic components a challenging issue for device designers. In past few decades, miniaturization of transistors has always obeyed the moore's law: the number of transistors that can be placed inexpensively on an integrated circuit has doubled approximately every two years. Nanoscale field effect transistors in the sub-10 nm regime, suffer from short channel effects such as direct tunneling from source to drain, increase in gate-leakage current and punchthrough effect. These effects have posed severe problems for miniaturized transistors and directed the recent research toward better alternative semiconductors than silicon. Semiconducting carbon nanotubes (CNTs) because of their properties like large mean free path, excellent carrier mobility and improved electrostatics at nanoscales as the result of their non-planar structure, have been known as the best ideal replacement for silicon. In particular, they exhibit ballistic transport over length scales of several hundred nanometers (Heinze, et al., 2006). Absence of the dangling bond states at the surface of CNTs and purely one-dimensional transport properties improve gate control while meeting gate leakage constrains and allows for a wide choice of gate insulators. That’s why CNTs suppress the short channel effects in transistor devices. Symmetry of the conduction and valence bands makes CNTs advantageous for complementary applications. CNTs are very attractive for nanoelectronic applications and can be used to achieve high speed ballistic carbon nanotube field effect transistors (CNTFETs). Theoretically, CNTFETs could reach a higher frequency domain (terahertz regime) than conventional semiconductor technologies. CNTFETs, only a few years after the initial discovery of CNTs in 1991 by Sumio Iijima (Iijima, 1991) were first demonstrated in 1998 by Dekker et al. at Delft University (Tans, et al., 1998) and soon after by groups at IBM (Martel, et al., 1998) and Stanford University (Soh, et al., 1999). Intensive research has led to a significant progress in understanding the fundamental properties of CNTs. By using a single-wall CNT as the channel between two electrodes which work as the source and drain contacts of a FET, a coaxial CNTFET can be fabricated. Coaxial devices are of special interest because their geometry allows for better electrostatics because the gate contact wraps all around the channel (CNT) and has a very good control on carrier 9
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