Fundamental conduction cooling limits for sub-1 µm Ga2O3 devices integrated with diamond

Abstract

Beta-phase gallium oxide (β-Ga2O3), as an ultrawide bandgap semiconductor, is promising for next generation power and radio frequency electronics. Its low thermal conductivity, however, poses a challenge to thermal management of devices composed of it, causing a reduced power performance as well as temperature-induced reliability problems. Several recent efforts have focused upon the impact of various device-level thermal management approaches, including integration with high-thermal-conductivity substrates (e.g., diamond and SiC) as a bottom-side passive heat extraction method, on the cooling performance of β-Ga2O3 devices. These efforts, however, have been restricted to cases where the Ga2O3 layer thicknesses are above 1 µm. Here, we address the fundamental conduction cooling limits for sub-1 µm β-Ga2O3 devices integrated with diamond via finite element simulations. A semi-classical transport theory for phonons interacting with interfaces is employed to systematically calculate the thickness-dependent thermal conductivity of the β-Ga2O3 layers with different crystallographic orientations for both cross-plane and in-plane directions. We find that the maximum power density of sub-1 µm β-Ga2O3 devices on diamond, particularly that of the 0.1 µm device, can reach up to 7.7 W mm–1 with a junction temperature limit of 200 °C, considering an optimal device orientation as well as best-case experimental Ga2O3/diamond thermal boundary conductance (TBC). As the Ga2O3/diamond TBC approaches the limit predicted by the diffuse mismatch model, the fundamental limit to the maximum power density of these devices can reach up to 8.6 W mm–1, which is comparable to those reported previously for costly augmented thermal management designs. Our findings suggest that the integration with diamond can fundamentally enhance the device-level cooling performance of Ga2O3 electronics, sub-1 µm devices in particular, and has thereby the potential to significantly reduce system-level cooling costs and packaging challenges.