Abstract
A function-based memory partitioning (FBMP) method is proposed and adopted in a low power digital signal processor (DSP) for cochlear implants (CIs). Based on pre-analysis of intended application programs, instructions and data are divided into functional groups with different accessed frequencies. Monolithic instruction and data memories are then partitioned into multiple sub-banks and assigned to functional groups according to their accessed frequencies. The FBMP method can reduce both power consumption and silicon area overhead. The implementation result on the CI-dedicated DSP shows that this method can save about 50% of the power at best with little additional area cost.
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