Abstract

A normally-off GaN double-implanted vertical MOSFET (DMOSFET) with an atomic layer deposition (ALD)-Al2O3 gate dielectric film on a free-standing GaN substrate fabricated by triple ion implantation is presented. The DMOSFET was formed with Si ion implanted source regions in a Mg ion implanted p-type base with N ion implanted termination regions. A maximum drain current of 115 mA/mm, maximum transconductance of 19 mS/mm at a drain voltage of 15 V, and a threshold voltage of 3.6 V were obtained for the fabricated DMOSFET with a gate length of 0.4 μm with an estimated p-type base Mg surface concentration of 5 × 1018 cm−3. The difference between calculated and measured Vths could be due to the activation ratio of ion-implanted Mg as well as Fermi level pinning and the interface state density. On-resistance of 9.3 mΩ·cm2 estimated from the linear region was also attained. Blocking voltage at off-state was 213 V. The fully ion implanted GaN DMOSFET is a promising candidate for future high-voltage and high-power applications.

Highlights

  • Wide-bandgap-based vertical power devices with normally-off operation have been developed in recent years [1,2,3,4,5,6,7,8]

  • Many defects were still present in the Si implanted layer after high-temperature but it seems that the defects thatdue were to more clearly seen after clearly seen after annealing in the Mgannealing, ion implanted layer were the localization of Mg atoms

  • Lower Ron could be achieved by reducing the sheet resistivity of the n-type epitaxial layer and pulsed Ids -Vds characteristics of the fabricated Gallium nitride (GaN) double-implanted vertical MOSFET (DMOSFET) measured at pulse width/period of the cell pitch of the DMOSFET

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Summary

Introduction

Wide-bandgap-based vertical power devices with normally-off operation have been developed in recent years [1,2,3,4,5,6,7,8]. The early SiC power MOSFETs were vertical trench MOSFETs (UMOSFETs), in which the base and source regions were formed epitaxially, without the need for ion implantation [2]. Recent GaN vertical power transistors have trench gate structures and low-resistance source regions utilized two-dimensional electron gas (2DEG) produced by polarization charges at the hetero-interface [19]. Ion implantation is a widely used doping technology for Si and SiC MOSFETs but it has been difficult to form a p-type doping layer using ion implantation technology for GaN device fabrication process until recently. Ion implantation is a widely used doping technology for Si and SiC MOSFETs but it has been difficult to form a p-type doping using ion implantation technology for GaN device fabrication process

Double Ion Implantation intolayer
Double Ion Implantation into GaN
Device Structure and Fabrication
Device Performances and Discussion
Conclusions
Methods

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