Abstract
A 6-phase, 3 interleaving cells bridged, fully-integrated 1/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4\times $ </tex-math></inline-formula> switched-capacitor converter (SCC) is proposed. Two techniques, called capacitor bridging and phase expansion, are proposed and implemented in this SCC to solve the idling capacitor problem and reduce area overhead. The phase clamp technique is also proposed to solve the drain and source flipping issue. This brief was designed in 65 nm CMOS technology, and measurement results show that the current density is improved by 25% comparing to the traditional 3-phase 1/ <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4\times $ </tex-math></inline-formula> SCC without sacrificing efficiency.
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