Fully-integrated bias control feed-back loop for efficiency enhancement of mmWave CMOS power amplifier

Abstract

A single-stage mmWave class-A CMOS power amplifier (PA) is fabricated in a BiCMOS 55 nm technology. In order to improve the power added efficiency (PAE) behavior of the PA, a bias-control feedback loop is fully implemented on-chip in order to dynamically adjust the DC bias current of the PA according to RF envelope power level. A tunable envelope detector is connected directly at the output of the amplifier in order to track the envelope variations of the output signal. Under constant bias conditions, the PA has a power gain (Gp) of 4.2 dB, a maximum PAE of 14 %, and an output compression point of around 7.5 dBm while driving 25 mA under 1.2 V supply voltage. In adaptive bias mode, the mean value of the DC current is reduced down to 20.8 mA, while holding the same Gp, leading to a good enhancement of the PAE over the linear input dynamic range of the PA. Simulations and measurements with a modulated 16-QAM 700 MHz input signal show that the applied technique improves the average PAE and DC power consumption by 17 % (relative to is nominal value) without significant degradation of the signal quality. For our best knowledge, the measurements with modulated signal are the first to be done on a dynamically biased mmWave PA.