Full-Field 3-D Flip-Chip Solder Bumps Measurement Using DLP-Based Phase Shifting Technique

Abstract

The flip chip, a type of chip mounting used in semiconductor devices, has become one of the most popular innovations in the semiconductor packaging industry. The height of flip-chip solder bumps ranges from 20 to 140 mum with a required measurement accuracy of 2 mu m. Three-dimensional (3-D) measurement of flip-chip solder bumps is crucial to flip-chip manufacturing quality and process control. Currently, 3-D measurement systems for flip-chip solder bumps are mainly based on laser scanning techniques. However, they require a high implementation cost, and suffer from low inspection speed due to the physical line-scanning process. In this paper, a fast and cost-effective 3-D measurement system for flip-chip solder bumps is proposed. The proposed system is based on a phase shift technique, in which the phase is accurately shifted by a software-controlled grating using a digital light processing (DLP) unit that allows full-field measurement of a projected flip chip. The DLP unit can provide a higher fringe-contrast pattern at a faster changing time than a liquid crystal display (LCD) panel. Phase shift-based measurement systems require a calibrated system parameter, which is generally considered a fixed value in currently available methods. In this paper, adaptive parameter values, instead of a fixed value, are used to improve measurement accuracy. The proposed system also adopts a fringe-contrast thresholding to solve the pseudo-surface height problem for high reflective solder bumps and low reflective substrate in a flip chip. Experiments have shown that the 3-D measurement of flip-chip solder bumps is very efficient and effective with the proposed system. Computation time of the proposed 3-D measurement system for a 640 x 480 image that contains almost 500 solder bumps is less than 1 s, and measurement accuracy meets the required specification of 2 mum.