Abstract
Several physics experiments are moving towards new acquisition models. In this work some ideas to implement Remote Direct Memory Access (RDMA) directly on the front-end electronics have been explored, part of the computing farm's CPU resources could be freed. New simulation techniques are introduced to understand RDMA over Converged Ethernet (RoCE) firmware block developed at ETH Zürich, including real-time firmware simulation leveraging SystemVerilog's useful features. The ability to explore a wider and dynamic inputs increases the likelihood of uncovering potential issues, identifying edge cases, and validating the system's performance across a broader range of scenarios.
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