Abstract
A CMOS front end electronics chain is being developed by the RD20 collaboration in a CERN R&D programme for silicon microstrip readout at LHC. It is based on a preamplifier and CR-RC filter, analogue pipeline and an analogue signal processor which implements a deconvolution algorithm. The system is described and latest results on performance presented, including the status of implementation in radiation hard technology.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
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