Abstract

Three-dimensional Integrated Circuits (3D IC) are being looked at as an alternative in overcoming some critical challenges plaguing conventional 2D ICs. However, it faces some new challenges — some of them being thermal management and a complicated testing process. This work presents a frequency-scaled thermal-aware test scheduling algorithm for 3D ICs. The thermal awareness is provided by a proposed machine learning based predictive thermal estimation model for 3D ICs. The proposed test scheduling algorithm includes test clock frequency as an important parameter and scales the frequency to achieve lower test time. Experimental results for both the predictive thermal model and scheduling algorithm look promising, with improvements over existing works achieved in most of the cases. The thermal model estimates the temperature of a 3D IC with a high degree of accuracy but at a fraction of time of commonly used 3D IC thermal models, while the scheduling algorithm has been observed to have improved test time of different benchmark circuits up to around 60%. Experimental results show — that test time in terms of clock cycles is inconsequential because schedules with higher clock count may require less time due to frequency scaling.

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