Abstract

This article presents a fully integrated modular wideband frequency interleaving (FI) transmitter and receiver for high data rate communication applications. At the transmitter side, three independent in-phase and quadrature-phase (IQ) baseband channels are upconverted to different intermediate frequencies (IFs) and then interleaved. At the receiver side, the interleaved signals are downconverted and separated back to each independent channel. Single-ended inputs and outputs are utilized to reduce the pin count, for a more practical realization and higher potential toward future system scaling. Special design techniques are followed to minimize crosstalk and intermodulation products between the channels. All circuits are manufactured and measured in a 130-nm SiGe:C BiCMOS technology with $f_{\textbf {T}}/f_{\textbf {max}}$ =300/500 GHz. The FI transmitter achieves a channel bandwidth of 2.5 GHz with less than 3-dB difference across different channels until 15-GHz IF. It consumes 560 mW from 2.5 and 3.3 V supplies and occupies a silicon area of 1.9 mm2. The FI receiver achieves a baseband channel bandwidth of 2.5 GHz with a 1-dB difference between the channels until the same IF. It consumes 860 mW from 2.5 and 3.3 V supplies and has a chip area of 1.55 mm2. The circuits are deployed in a communication experiment; first, in a back-to-back test with a direct cable connection, demonstrating a data rate of 15.6 Gb/s across the three IQ channels with a 16-QAM modulation scheme and a worst case transmitter-to-receiver error vector magnitude (EVM) of −18.6 dB. Then, a wireless experiment is performed with a 240-GHz front end with on-chip antenna, demonstrating a data rate of 7.8 Gb/s with QPSK modulation and a worst case EVM of −8.3 dB, across a wireless link of 15 cm. To the best of our knowledge, this is the first article that demonstrates a wireless transmission at sub-terahertz (sub-THz) carrier frequencies utilizing FI architectures.

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