Abstract
Collision detection in motion planning is time-consuming for robotic arm applications, especially real-time motion planning in a dynamic environment. It is necessary to design a collision detection accelerator for real-time robot motion planning. In this paper, an optimized FPGA-based design is proposed to reduce the hardware cost. Static random access memory (SRAM) is used to store encoded collision detection data for saving the FPGA look up tables (LUTs). The collision detection accelerator implementations based on SRAM and LUT are analyzed and compared in terms of hardware cost and time consumption. Experimental results are shown to prove the efficiency of the proposed design and implementation.
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