FPGA-based acceleration of mutual information calculation for real-time 3D image registration

Abstract

Real-time image registration is potentially an enabling technology for the effective and efficient use of many image-guided diagnostic and treatment procedures relying on multimodality image fusion or serial image comparison. Mutual information is currently the best known image similarity measure for multimodality image registration. Mutual information calculation is a memory-intensive task that does not benefit from cache-based memory architecture in standard software implementations (i.e., the calculation incurs a large number of cache misses). Previous attempts to perform image registration in real time focused on parallel supercomputer implementations, which achieved real-time performance using large, expensive supercomputers that are simply impractical for deployment in a hospital. We have developed a custom hardware architecture that, in a single-module PC-based implementation, achieves registration speeds comparable to those of a 64-processor parallel supercomputer. The single-module speedup results from using parallel memory access and parallel calculation pipelines. The total speedup can be increased by using several modules in parallel. The architecture is designed for linear, mutual information-based registration and can be extended to elastic (nonlinear) registration.