Abstract

In FPGA, routing hotspot affects ring oscillator (RO) performance. The significant difference in routing hotspot between RO locations eliminates physical variation, which is the identity of Physical Unclonable Functions (PUF). This study compares the performance of conventional and uniform routing hotspot RO in Cyclone V chips. For this purpose, ROs and counters are placed in 10 adjacent locations. RO frequency at all locations was measured by a Digital Discovery II, a PC based logic analyzer. In the conventional design, there are significant differences in routing hotspot among RO locations. Meanwhile, in a uniform design, the difference in routing hotspot has been reduced by relocating several logics around specific locations. As a result, the reliability of the conventional design is higher than the uniform routing hotspot design when implemented with 11-stage RO (RO11) and 20-stage RO (RO20). However, the uniqueness of the uniform routing hotspot is better than the conventional ones. Furthermore, the uniformity of the uniform routing hotspot design is closer to the ideal in 20-stage. Conversely, in the 11-stage implementation, the closer uniformity to the ideal is obtained using a conventional design.

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