FPGA Implementation of the ECC Over GF(2 m ) for Small Embedded Applications

Abstract

In this article, we propose a compact elliptic curve cryptographic core over GF(2 m ). The proposed architecture is based on the Lopez-Dahab projective point arithmetic operations. To achieve efficiency in resources usage, an iterative method that uses a ROM-based state machine is developed for the elliptic curve cryptography (ECC) point doubling and addition operations. The compact ECC core has been implemented using Virtex FPGA devices. The number of the required slices is 2,102 at 321MHz and 6,738 slices at 262MHz for different GF(2 m ). Extensive experiments were conducted to compare our solution to existing methods in the literature. Our compact core consumes less area than all previously proposed methods. It also provides an excellent performance for scalar multiplication. In addition, the ECC core is implemented in ASIC 0.18μm CMOS technology, and the results show excellent performance. Therefore, our proposed ECC core method provides a balance in terms of speed, area, and power consumption. This makes the proposed design the right choice for cryptosystems in limited-resource devices such as cell phones, IP cores of SoCs, and smart cards. Moreover, side-channel attack resistance is implemented to prevent power analysis.