FPGA implementation of symbol timing synchronization for OFDM systems

Abstract

In this work, after some of the commonly used symbol timing synchronization algorithms used in orthogonal frequency division multiplexing systems are examined, a two-step (coarse and fine) symbol time offset (STO) correction algorithm based on Schmidl & Cox [1] approach is investigated in Simulink model. Subsequently, relying on this Simulink model, the STO algorithm is implemented on ZYNQ ZC706 XC7Z045 FPGA working fully parallel at a clock rate of 200 MHz. The implementation results are compared with the other related studies in the literature.