FPGA Implementation of Space-Based AIS

Abstract

The Automatic Identification System (AIS) is an automated tracking system used for exchanging static and dynamic vessel information between the AIS terminals. Data transmitted by the AIS station is received by other vessel or base station. But due to the range limitations in the ground-based network, we go for Space-based Universal ship-borne Automatic Identification System (S-AIS) wherein the AIS-Data is received by satellite for the global coverage. In this paper, we present the performance analysis of the space-based AIS system considering the Field of View (FoV) of the satellite spanning a large number of Self-Organizing Time Division Multiple Access (SOTDMA) clusters and implementation of AIS Modem using SOTDMA scheme with Gaussian Minimum Shift Keying (GMSK) modulation. The introduction of reconfigurable devices and high level hardware description languages have made the design of AIS modem to be implemented efficiently on Virtex5-xc5vlx110t FPGA. The system is optimized in terms of hardware utilization. The SOTDMA architecture is designed at the Behavioral level of abstraction with constraints as defined by International Telecommunication Union (ITU) and is implemented using Verilog Hardware Description Language (HDL) on the FPGA, GMSK modulator and demodulator is designed in Xilinx System Generator. The SOTDMA architecture implemented is tested by considering multiple users to verify the unique slot allocation within a SOTDMA cluster. The FPGA implementation results are presented.