Abstract
This paper presents the hardware implementation of a stand-alone Electrical Capacitance Tomography (ECT) system employing a Field Programmable Gate Array (FPGA). The image reconstruction algorithms of the ECT system demand intensive computation and fast processing of large number of measurements. The inner product of large vectors is the core of the majority of these algorithms. Therefore, a reconfigurable segmented parallel inner product architecture for the parallel matrix multiplication is proposed. In addition, hardware-software codesign targeting FPGA System-On-Chip (SoC) is applied to achieve high performance. The development of the hardware-software codesign is carried out via commercial tools to adjust the software algorithms and parameters of the system. The ECT system is used in this work to monitor the characteristic of the molten metal in the Lost Foam Casting (LFC) process. The hardware system consists of capacitive sensors, wireless nodes and FPGA module. The experimental results reveal high stability and accuracy when building the ECT system based on the FPGA architecture. The proposed system achieves high performance in terms of speed and small design density.
Highlights
The Electrical Capacitance Tomography (ECT) is one of the recent techniques applied for visualizing industrial applications
Replacing DSP processors with Field Programmable Gate Array (FPGA) platforms enhances the performance of the ECT system since a decent part of the control/data flow of the image reconstruction algorithm can be implemented on the FPGA
A typical ECT system contains three hardware parts, an array of electrodes mounted around the area of interest, a data acquisition unit including a multiplexer to switch between capacitance sensors, and a computing device to carry out the image reconstruction and the parameters’ analysis [24]
Summary
The Electrical Capacitance Tomography (ECT) is one of the recent techniques applied for visualizing industrial applications. Replacing DSP processors with FPGA platforms enhances the performance of the ECT system since a decent part of the control/data flow of the image reconstruction algorithm can be implemented on the FPGA. Applying the FPGA in just the data acquisition process without involving it in the image reconstruction procedure causes the low throughput of the system [17] Other tomography techniques such as Computed Tomography (CT) [18], Electrical Impedance. The substantial functioning of Graphics Processing Units (GPU) for arithmetically exhaustive algorithms drives the implementation of the 3D ECT system [21] Their performance is lower than the FPGA since it needs a lot of random off-chip memory access. The proposed image reconstruction algorithm was fully implemented on the FPGA to attain high time resolution.
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