Abstract
A field-programmable gate array (FPGA) implementation of a new algorithm for multiuser detection (MUD) is presented in this paper. This FPGA design is based on the dichotomous coordinate descent (DCD) algorithm. The DCD algorithm allows the multiplication-free solution of the normal equations appearing in the MUD problem. This results in an area-efficient FPGA design that requires about 400 slices and offers a constant throughput over a signal-to-noise ratio range. Results obtained from the fixed-point FPGA implementation are compared with those of a floating-point implementation. The bit- error-rate field-programmable gate arrayperformance comparison shows good match of the results for as large number of users as 50.
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