FPGA Implementation of Archery Target Detection using Color Sequence Recognition Algorithm

Abstract

In this paper, an implementation of image processing methods to extract and recognize a standard tri-colored archery target to a field-programmable gate array is demonstrated. Detection and recognition of the archery target was never been done on an FPGA platform. The platform used to realize the design was the ZedBoard™ Development Kit equipped with Xilinx Zynq®-7000 All Programmable system on chip. The algorithms used to extract the central region is based on color classification in HSV color space. Once each image pixels are classified, the color sequence recognition algorithm attempts to look for the target and extract the central region of the archery target if present. Image filtering techniques and analysis such as morphological filtering and contour feature analysis are used to properly identify the shape and location of the extracted pixels. Discussed next is the implementation of the algorithm both in the software and hardware aspects and a comparison between their response time and accuracy is demonstrated. There was about two-fold decrease in processing time when FPGA implementation was deployed. The accuracy of the system was also tested and able to reach an accuracy of 96.67% for near target distance. For far target distance, the accuracy degraded to 88.33% but the system has managed to maintain its specificity value despite the noise becoming dominant for smaller region occupied by the target.