Abstract
The pulse compression techniques in radar systems allow the use of low-power transmitters without affecting neither the maximum range nor the resolution capacity. As part of the implementation of these techniques it is necessary to develop flexible and low cost devices that consume few resources of the available hardware. For these reasons in this article it is addressed a FPGA implementation of a system that synthesizes a phase manipulated signal with great duration-bandwidth product, which duration and frequency are adjustable. Furthermore, a significant change in the compressor's phase detectors is proposed, replacing the commonly used lowpass filters by a moving average filter. The new phase detectors require a single multiplier for implementation, reducing consumption of FPGA logic elements.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
