FPGA implementation of a chaos-based image encryption algorithm

Abstract

With the rapid development of communication networks and the establishment of 5G networks, there is a growing demand for the transmission of images and videos with different sizes and formats. Since these can contain sensitive and personal information, security is of great importance when transferring the contents of such files. Therefore, the use of powerful encryption mechanisms is an absolute requirement to protect the confidentiality of the exchanged data. In this study, we propose an image encryption algorithm with a high level of security. Thus, a chaotic system is proposed, and its state variables have been used to create a new substitution matrix. The importance of this matrix lies both in its use to generate encryption keys and in the encryption algorithm itself. In formulating the proposed encryption algorithm, we adopted the Feistel network in addition to some steps of the Advanced Encryption Standard (AES). The results of the various tests prove that the proposed algorithm guarantees high resistance to statistical and differential attacks and can therefore be used safely in image encryption. The incorporation of various algorithms suggested in this article in the form of IPcore for FPGA platforms amply promotes the use of our cryptosystem in various embedded systems or IoT environments.