FPGA Image Stitching Design Based on Improved SURF Algorithm

Abstract

With the development of FPGA and computer vision technology, the image stitching system not only requires fast and accurate but also puts forward higher requirements for structure and power consumption. In traditional stitching, the SURF algorithm is high but has a complicated and time-consuming problem, so it proposes a FPGA image stitching system design based on improving the SURF algorithm. In order to improve the detection speed of the feature point, integrate it into the FAST algorithm, and use the improved Ransac algorithm to match the point of the matching point. Finally, the stitching image is fused with a weighted method. The entire system design uses SOC FPGA to achieve, combined with software and hardware, and gives full play to the advantages of FPGA parallel computing and the flexible control of ARM processors. The results show that this splicing system is small in size and can stabilize stitching with higher accuracy. It has greater theoretical value and is more suitable for embedded fields.