FPGA developments for the SPARTA project: Part 2

Abstract

The European Southern Observatory (ESO) and Durham University's Centre for Advanced Instrumentation (CfAI) continue to progress the design of a next generation Adaptive Optics (AO) Real-Time Control System (RTCS). This common flexible platform, labelled SPARTA 'Standard Platform for Adaptive optics Real-Time Applications' will control the AO systems for a set of 2^nd generation VLT instrumentation, and will scale to implement the initial AO systems for the European Extremely Large Telescope (E-ELT). Durham has used Field Programmable Gate Arrays (FPGA) to design a front-end Wavefront Sensor (WFS) Processing Unit (WPU) for SPARTA. FPGA devices have been used to alleviate the highly parallel computationally intensive WPS processing task from system processors to increase the obtainable control loop frequency and reduce the computational latency in the control system. The FPGA device reduces WFS frames to gradient vectors before passing the data to the system processors. The FPGA allows the processors to deal with other tasks such as wavefront reconstruction, telemetry and real-time data recording, allowing for more complex adaptive control algorithms to be executed. Durham has design, coded, implemented and tested a FPGA core incorporating the VITA 17.1 standard serial Front Panel Data Port (sFPDP) protocol to allow a data transfer rate of 2.5Gbps^-1 from the WFS Controller to the SPARTA platform. This paper overviews the SPARTA WPU requirements and design, the sFPDP FPGA Core and a description of the platform's implementation phase.