FPGA design of a queue management equipment with variable-length packets switching on the satellite onboard switch

Abstract

In order to solve the problem of the limitation of hardware resource consumption on the satellite onboard switch, this paper implements a kind of queue manager circuit, and introduced the design ideas, working process of each module. Key modules are programmed and realized with Verilog HDL. The results of ModelSim former simulation show that the circuit satisfies the functions of queue management equipment which is of high efficiency in cell switching.