Abstract
During the High Luminosity LHC, the CMS detector will need charged particle tracking at the hardware trigger level to maintain a manageable trigger rate and achieve its physics goals. The tracklet approach is a track-finding algorithm based on a road-search algorithm that has been implemented on commercially available FPGA technology. The tracklet algorithm has achieved high performance in track-finding and completes tracking within 3.4 $\mu$s on a Xilinx Virtex-7 FPGA. An overview of the algorithm and its implementation on an FPGA is given, results are shown from a demonstrator test stand and system performance studies are presented.
Highlights
CERN’s LHC accelerator complex will undergo major upgrades, planned for 2025, to increase the instantaneous luminosity up to around 7.5 × 1034 cm−2s−1 [1]
The method is based on a road-search algorithm that is implemented on commercially available FPGA technology
The tracklet algorithm has been implemented as a floating-point simulation, integer-based emulation, and in an FPGA
Summary
CERN’s LHC accelerator complex will undergo major upgrades, planned for 2025, to increase the instantaneous luminosity up to around 7.5 × 1034 cm−2s−1 [1] This era of the High Luminosity LHC (HL-LHC) will yield an average number of overlapping proton-proton collisions per bunch crossing (pileup or PU) between 140 and 200. The upgraded (“Phase 2”) CMS detector will include an all silicon tracker that is designed to integrate tracking into the L1 trigger decision. The pixelated sensor of the PS modules provides a precise measurement of the displacement along the beam line (z-axis), which enables primary vertex reconstruction at the L1 level. Correlated hits (“stubs") in pT modules are required to be consistent with a pT > 2 GeV track originating from the interaction point. The sections will detail the tracklet algorithm, implementation on hardware, performance results, and some projections towards making a full system for completing L1 tracking at CMS at the HL-LHC
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