FPGA based Sinusoidal pulse width modulated frequency converter

Abstract

The laboratory prototype of a frequency converter (FC) is analyzed using readily available Spartan-3E Field Programmable Gate Array (FPGA) kit and Personnel Computer (PC). The output frequency range has been varied over a wide range by implementing Sinusoidal pulse width modulation (SPWM) technique, in order to minimize the harmonics, using very high speed integrated circuit hardware descriptive language (VHDL). The experimental set-up for the FC circuit has also been developed in order to verify the MATLAB/Simulink analysis of the circuit. The Total harmonic distortion (THD) analysis is obtained experimentally for un-modulated and modulated frequency converter. It has been demonstrated that for step-up mode of operation of modulated frequency converter, minimum voltage THD is 6.6 % and current THD is 2.1 %. While during step-down mode of operation, 1.8% is minimum voltage THD and 1.1% is minimum current THD respectively. The THD in voltage and current has been significantly minimized by implementing FC with SPWM technique.