Abstract

This paper presents the design and implementation of a field-programmable gate array (FPGA)-based architecture for the speed control of sensorless permanent-magnet synchronous motor (PMSM) drives. For the reduction of computation resources, as well as accuracy improvement in the rotor position estimation, a parallel reduced-order extended Kalman filter (EKF) is proposed in this work. Compared with an EKF, the system order is reduced and the iteration process is greatly simplified, resulting in significant savings of resource utility, while maintaining high estimation performance. The whole control system includes a current-control-and-coordinate-transformation unit, a proportional-integral (PI) speed controller, and other accessory modules, all implemented in a single FPGA chip. A hardware description language is adopted to describe advantageous features of the proposed control system. Moreover, the finite-state-machine method is applied with the purpose to reduce logic elements used in the FPGA chip. The validity of the approach is verified through simulation based on the Modelsim/Simulink cosimulation method. Finally, experimental results are obtained on an FPGA platform with an inverter-fed PMSM to show the feasibility and effectiveness of the proposed system-on-programmable-chip for PMSM drives.

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