FPGA based hardware implementation of Bat Algorithm

Abstract

Several meta-heuristics algorithms are used mainly for research of global optimal solutions for real and non-convex problems. Some of them are the Genetic Algorithms (GA), Cuckoo Search algorithms (CS), Particle Swarm Optimization (PSO). Some algorithms have achieved satisfactory results but not all of them. Therefore, new algorithms give better optimization to solve many problems having continuous search space like Bat Algorithm (BA). That’s why we proposed a new hardware implementation on Field Programmable Gate Array (FPGA) of bat algorithm, it is a new proposed meta-heuristic for global optimization. The work presented in this article is designed to use new digital dedicated hardware solutions such as FPGAs that are available to generate a better implementation of bat algorithm. This circuit is well adapted to many applications because its material structure is molded with the requirements of calculations. Moreover the inherent parallelism of these new hardware solutions and their large computing capabilities makes the computing time negligible despite the complexity of these algorithms.