Abstract

Accurate real-time motion estimation is very critical to many computer vision tasks. However, because of its computational power and processing speed requirements, it is rarely used for real-time applications, especially for micro unmanned vehicles. In our previous work, a FPGA system was built to process optical flow vectors of 64 frames of640×480image per second. Compared to software-based algorithms, this system achieved much higher frame rate but marginal accuracy. In this paper, a more accurate optical flow algorithm is proposed. Temporal smoothing is incorporated in the hardware structure which significantly improves the algorithm accuracy. To accommodate temporal smoothing, the hardware structure is composed of two parts: the derivative (DER) module produces intermediate results and the optical flow computation (OFC) module calculates the final optical flow vectors. Software running on a built-in processor on the FPGA chip is used in the design to direct the data flow and manage hardware components. This new design has been implemented on a compact, low power, high performance hardware platform for micro UV applications. It is able to process 15 frames of640×480image per second and with much improved accuracy. Higher frame rate can be achieved with further optimization and additional memory space.

Highlights

  • Optical flow aims to measure motion field from the apparent motion of the brightness pattern

  • Our goal in this paper is to improve the accuracy of previous hardware optical flow designs under the prerequisite of speed and feasibility

  • Two main components of this design: derivative (DER) module and optical flow computation (OFC) module are connected to the processor local bus (PLB) bus through a bus interface

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Summary

Introduction

Optical flow aims to measure motion field from the apparent motion of the brightness pattern. An accurate hardware-friendly optical flow algorithm is proposed and its hardware design is presented in this paper. The processing time of existing optical flow algorithms is usually on the order of seconds or longer per frame. A tensorbased optical flow algorithm was implemented on an FPGA to process 64 frames of 640 × 480 image per second. Our goal in this paper is to improve the accuracy of previous hardware optical flow designs under the prerequisite of speed and feasibility. The temporal smoothing used prevents the creation of a fully pipelined design It requires additional memory bandwidth, leading to a processing rate of 15 frames per second for 640 × 480 images.

Algorithm Description
Smoothing Masks
Hardware Structure
Hardware Platform
Synthetic Sequences
Real Sequences
Conclusion
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