FPGA Based Design and Implementation of Improved Edge Detection Algorithm using LOG Operator

Abstract

Detection speed and precision are key indicators of the edge detection systems. To increase the precision of edge detection and enhance its engineering practicability, an improved edge detection algorithm based on Laplace of Gaussian (LOG) operator is proposed in this paper. In this algorithm, the first order partial derivative in different direction is calculated to judge the direction of the gradient. Then, the position of zero crossing point is positioned according to the value of LOG operator in the gradient direction. Furthermore, according to the number of zero crossing points of the adjacent points in the direction of the gradient normal vector, the image is filtered and breakpoints are connected. For convenience in engineering application of digital image processing, this proposed edge detection algorithm is implemented on Field-Programmable Gate Array (FPGA) chip. The experiment results show that this proposed algorithm is easy to be implemented on hardware and has much higher accuracy in edge detection performance. Due to the parallel processing capability of FPGA chip, the designed edge detection system is suitable for real-time image processing applications.