FOSquare: A Novel Optical HPC Interconnect Network Architecture Based on Fast Optical Switches with Distributed Optical Flow Control

Fulong Yan,Chao Li,Changshun Yuan,Xiong Deng

doi:10.3390/photonics8010011

Fulong Yan, Chao Li + Show 2 more

Open Access

https://doi.org/10.3390/photonics8010011

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Abstract

Interconnecting networks adopting Fast Optical Switches (FOS) can achieve high bandwidth, low latency, and low power consumption. We propose and demonstrate a novel interconnecting topology based on FOS (FOSquare) with distributed fast flow control which is suitable for HPC infrastructures. We also present an Optimized Mapping (OPM) algorithm that maps the most communication-related processes inside a rack. We numerically investigate and compare the network performance of FOSquare with Leaf-Spine under real traffic traces collected by running multiple applications (CG, MG, MILC, and MINI_MD) in an HPC infrastructure. The numerical results show that the FOSquare can reduce >10% latency with respect to Leaf-Spine under the scenario of 16 available cores.

Highlights

Driven by the requirements of the computing in large-scale scientific problems and the processing of massive data, such as computing simulation, gene sequencing, weather forecast, and so on, the peak arithmetic speed of the High-Performance Computing (HPC) infrastructure has had an increase of multiple orders of magnitude and reached 125.4 PFlop/s during the last five years [1]
We demonstrate a novel scalable and low latency HPC interconnecting architecture based on distributed fast optical flow control Fast Optical Switches (FOS) that scales as the square of the FOS port count (FOSquare)
We present the simulation results with the proposed Optimized Mapping (OPM) mechanism for four different applications CG, MG, MILC, and MINI_MD in FOSquare and LeafSpine under three scenarios

Summary

Introduction

Driven by the requirements of the computing in large-scale scientific problems and the processing of massive data, such as computing simulation, gene sequencing, weather forecast, and so on, the peak arithmetic speed of the High-Performance Computing (HPC) infrastructure has had an increase of multiple orders of magnitude and reached 125.4 PFlop/s during the last five years [1]. This imposes stringent requirements for accommodating the booming HPC applications; an open research question is: How can we efficiently scale out the servers count and scale up the data rate with a satisfactory performance under a suitable interconnecting architecture?. Several optical switching technologies have been investigated based on Opto-mechanical and

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