Abstract
Generally, reverse-biased photodetectors (PDs) are used for high-speed optical receivers. The forward voltage region is only utilized in solar-cells, and this photovoltaic operation would not be concurrently obtained with high efficiency and high speed operation. Here we report that photonic-crystal waveguide PDs enable forward-biased high-speed operation at 40 Gbit/s with keeping high responsivity (0.88 A/W). Within our knowledge, this is the first demonstration of the forward-biased PDs with high responsivity. This achievement is attributed to the ultracompactness of our PD and the strong light confinement within the absorber and depleted regions, thereby enabling efficient photo-carrier generation and fast extraction. This result indicates that it is possible to construct a high-speed and ultracompact photo-receiver without an electrical amplifier nor an external bias circuit. Since there is no electrical energy required, our estimation shows that the consumption energy is just the optical energy of the injected signal pulse which is about 1 fJ/bit. Hence, it will lead to an ultimately efficient and highly integrable optical-to-electrical converter in a chip, which will be a key ingredient for dense nanophotonic communication and processors.
Highlights
The energy consumption and footprint of a photoreceiver are critical issues as regards increasing the integration density in an on-chip/off-chip photonic network designed to provide high-performance computing and data management
One concern is that the energy consumption of transimpedance amplifiers (TIAs) and certain voltage amplifier stages integrated with a photodetector (PD) to generate sufficient output voltage is as much as several hundred femtojoule per bit (fJ/bit).[2,3]
We demonstrated the highly efficient and fast operation of a forward-biased photonic crystal (PhC)-waveguide PD and discussed a way to realize an amplifier-free bias-free receiver
Summary
The energy consumption and footprint of a photoreceiver are critical issues as regards increasing the integration density in an on-chip/off-chip photonic network designed to provide high-performance computing and data management. To pursue an amplifier-free and bias-free combination, we need to consider the fact that a resistor-loaded PD would lead to a forward voltage across the PD,[10] as discussed later Such a forward voltage region for a p-i-n-PD is generally used for a solar cell or photo-voltaic cell and would not be concurrently obtained with both the high efficiency and the high speed operation (e.g., GHz range) demanded for the optical receiver. The impulse and random signal responses suggest 40-Gbit/s operation at a forward bias of 0.2 V Based on these experimental results, we simulate a resistor-loaded PD receiver circuit when assuming a kΩ-level load resistance and an ultralow capacitance of about 1 fF, which are possible for a few-μm PhC-PD. This will offer a way of realizing a fJ/bit-energy photoreceiver with a μm[2] footprint
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