Abstract

MOSFETs scaling-down is an effective way to attain high-performance CMOS operating with lower power and leakage current. However, short channel effects have become a serious problem due to the shortening of channel length. One of the promising methods to suppress this problem is by forming a shallow, highly doped and activated source/drain extension region. Fabricating ultra shallow p+/n junction is difficult due to the channeling of boron ions and anomalous boron diffusion during fabrication processes. A combination of Ge pre-amorphization implantation, low-energy boron implantation and two-step annealing, involving low-temperature solid phase epitaxy preannealing followed by non-melt laser annealing was used for forming ultra shallow p+/n junction in silicon. The physical relationship among the regrowth of implanted layer, boron activation and diffusion, and leakage current is investigated. We have succeeded in forming ultra shallow p+/n junction with junction depth of 8 nm and sheet resistance of 920 Ω/□.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.