Abstract
AbstractThe generation of misfit dislocations (MDs) and stacking faults (SFs) was studied by TEM and preferential chemical etching in multilayer Si(001)/SiGe/SiGeC(10 nm)/SiGe/Si heterostructures grown by CVD at 650 °C. Prior to growth of Si layer, the other part of heterostructure was annealed at 950 °C in the growth chamber to get relaxed buffer layers and strained Si layer free of extended defects. We used SiGe alloys with Ge content of 24 at.% and C content of 0.5 at.%. Carbon in the strained SiGe matrix was found to promote high rates of strain relaxation through the nucleation of perfect dislocation loops close to the interface with Si substrate. For Si layer thickness >10 nm, threading dislocations split in these layers under tensile strain to form SFs. (© 2007 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)
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