Abstract
Siemens Corporate Technology has developed a methodology for formal verification. This methodology allows to prove or falsify the correctness of programs for a PLC (programmable logical controller) fully automatically and exactly in a strongly mathematical sense. A program is correct, if eveiy possible execution trace of the program fulfils a set of required properties specified by the user. For instance, a property for a traffic light control at some given intersection could be 'traffic lights never all show green at the same time' or 'when a car stops at a red traffic light that traffic light will eventually switch to green'. For this verification method a tool has been developed that checks properties fully automatically and completely. In case a given property is not satisfied by the PLC-program, the verification tool generates an execution trace of the program (a so-called countersequence) that illustrates its erroneous behaviour. In a pilot application, tool machine manufacturers used and evaluated the verification tool with respect to specification, error detection, cost/benefit-estimation and other criteria for verification. The verification tool was received very well.
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