Focused ion beam written lateral field-effect transistors on standard silicon wafers

Abstract

Lateral field effect devices can be produced by focused ion-beam implantation of 100 keV gallium into an arsenic doped layer on standard silicon wafers. The lateral electric field-effect across an implanted line controls the current through a small channel, leading to a gate voltage controlled source-drain current. In-plane gate transistors prepared this way are presented here. With typical geometrical channel widths around 2 μm, they show a drain saturation current of 35 μA and a transconductance of 28 μS. The threshold gallium dose, required to form lateral npn barriers after rapid thermal annealing is about 10 times the carrier density of the n-doped layer. Though the lateral electric field-effect is expected to be sensitive to the sample surface, the unpassivated transistors showed no significant aging over several weeks.