Abstract

Various process sequences are established for depositing inter-metal-dielectrics (IMD).The most common insulating stack between metal layers is SOG / etch-back. The sequence is as follows: Silane-oxide deposition - Spin-on-glass application -etch-back of SOG - another silane-oxide deposition. This process flow has several draw-backs. It is time consuming, takes a lot of equipment and has got high COO, due to the complexity of process steps. As an alternative we investigated Flowfill. Flowfill is a new self planarising process for depositing silane oxide layers. The chemistry is very simple. It is a reaction of Silane and hydrogen peroxide, leading to a liquid intermediate. The gas phase reaction produces vaporised glass which condenses as a liquid on substrates cooled to approximately zero degrees Celsius. This liquid state is the main reason for reaching good gap fill and excellent planarity. After polymerisation, the resulting silica film contains a lot of water. This problem is solved by a heat treatment. In the Flowfill sequence the insulating block of layers between the metal lines is done in one System and in one go. Thus saving a lot of physical process time. The stack consists of three layers: base - flow - cap. The base layer treatment results in good adhesion for the following flow and a moisture barrier for the devices. The cap avoids cracks in the flow layer during heat treatment. After this annealing the cap is no more necessary and can be removed. Base and cap are deposited as PE-CVD silane oxide. The result is a competitive IMD. We are presenting a new type of IMD: the Flowfill - Process sequence and its advantages. The motivation of changing to Flowfill is lower cost of ownership. The shorter physical process time is also an important advantage in production of logical devices. The via-resistance is stable over the wafer.

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