Flip-Chip Underfill: Materials, Process and Reliability

Abstract

In order to enhance the reliability of a flip-chip on organic board package, underfill is usually used to redistribute the thermo-mechanical stress created by the Coefficient of Thermal Expansion (CTE) mismatch between the silicon chip and organic substrate. However, the conventional underfill relies on the capillary flow of the underfill material and has many disadvantages. In order to overcome these disadvantages, many variations have been invented to improve the flip-chip underfill process. This paper reviews the recent advances in the material design, process development, and reliability issues of flip-chip underfill, especially in no-flow underfill, molded underfill, and wafer-level underfill. The relationship between the materials, process and reliability in these packages is discussed.