Abstract

This article presents a wide-band suppression technique of flicker phase noise (PN) by means of a gate–drain phase shift in a transformer-based complementary oscillator. We identify that after naturally canceling its second-harmonic voltage by the complementary operation itself, third-harmonic current entering the capacitive path is now the main cause of asymmetry in the rising and falling edges, leading to the <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1/f$ </tex-math></inline-formula> noise upconversion. A complete <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1/f^{3}$ </tex-math></inline-formula> PN analysis for the transformer-based complementary oscillator is discussed. By tuning gate–drain capacitance ratio, a specific phase-shift <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">range</i> is introduced at the gate and drain nodes of the cross-coupled pair to mitigate the detrimental effects of ill-behaved third-harmonic voltage, thus lowering the flicker PN. To further reduce the area and improve the PN in the thermal region, we introduce a new triple-8-shaped transformer. Fabricated in 22-nm FDSOI, the prototype occupies a compact area of 0.01mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and achieves <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1/f^{3}$ </tex-math></inline-formula> PN corner of 70kHz, PN of −110dBc/Hz at 1MHz offset, figure-of-merit (FoM) of −182dB at 9GHz, and 39% tuning range (TR). It results in the best FoM with normalized TR and area (FoM <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">TA</sub> ) of −214dB at 1MHz offset.

Highlights

  • W ITH the CMOS devices scaling down, their worsening 1/ f noise [1], [2] leads to the increase of flicker phase noise (PN) in oscillators

  • On the other hand, ring oscillators benefit from the CMOS technology scaling, occupying a compact area with a wide tuning range (TR), and are not susceptible to magnetic pulling

  • We propose a complementary oscillator using a triple-8-shaped transformer, simultaneously featuring a compact area of 0.01 mm2, wide tuning range (TR) of 39%, 1/ f 3 PN corner of 70 kHz, and electromagnetic compatibility, combining both benefits of LC-tank-based and inverter-ringbased oscillators [14]

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Summary

INTRODUCTION

W ITH the CMOS devices scaling down, their worsening 1/ f noise [1], [2] leads to the increase of flicker phase noise (PN) in oscillators. On the other hand, ring oscillators benefit from the CMOS technology scaling, occupying a compact area with a wide TR, and are not susceptible to magnetic pulling Both their thermal and flicker PN are much worse than in the LC oscillators, and they are highly susceptible to the supply noise (i.e., high supply pushing).

FLICKER NOISE UPCONVERSION AND CM RETURN PATH IN COMPLEMENTARY OSCILLATORS
CM Return Path in Complementary Oscillators
Flicker Noise Upconversion and Numerical Verification
GATE–DRAIN PHASE SHIFT IN TRANSFORMER-BASED COMPLEMENTARY OSCILLATORS
Gate–Drain Passive Gain AGD
Gate–Drain Phase Shift φGD
Design of Triple-8 Shaped Transformer With Compact Area
EXPERIMENTAL RESULTS

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