Abstract

Transceivers for backplane serial links at 25Gb/s and beyond demand equalizers with high accuracy and flexibility in matching the channel response. To this purpose, a continuous-time linear equalizer (CTLE) with a transversal architecture is proposed. The equalizer features variable DC gain and two zeros that can be tuned independently. The transversal architecture makes it compatible with gradient descent algorithms, allowing optimal adaptation of the gain and zero frequency locations and improved equalization accuracy. The CTLE was realized in a 28nm CMOS technology and measurements are presented at data rate from 5Gb/s to 25Gb/s across 20dB-loss channels. Core power dissipation is 17mW from 1V supply and horizontal eye opening at BER=10−12 is larger than 50%, comparing favorably against previously reported equalizers targeting similar data-rate and channel loss.

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